Full Duplex 100Gbps Ethernet adaptor fbC2CGg3

Full Duplex 100Gbps Ethernet adaptor fbC2CGg3

Silicom Network Monitoring & Capturing Network Monitoring Adapter Card


Capture Card – Dual QSFP28 port card supporting 2x100G Ethernet, half-length, PCIe Gen3 16 lanes

The Silicom Denmark fbC2CGg3 is a powerful half length accelerator card featuring two QSFP28 slots, providing network connectivity and high speed capture to host memory with zero packet loss and packet processing. The 2xQSFP28 slots support configurations with data rates of 8x10GE, 2x40GE, 8x25GE or 2x100GE, while supporting a bandwidth to host system of over 200 Gbps. Dedicated firmwares are offered for each link speed.

The fbC2CGg3 is mounted with the latest Ultrascale Xilinx FPGA technology, providing packet filtering, advanced processing, traffic management, load balancing and host offloading mechanisms, to a wide range of applications. In addition to this, Tx capabilities are also supported for traffic redirection and selective bypass.

The card is a single-slot PCIe solution for a 16-lane PCIe slot, and features an optional 2nd 16-lane PCIe connector for connecting to a 2nd PCIe slot. The 16-lane connections are via 2×8 lanes using bifurcation. With its two PCIe connectors, the card can offer traffic load balancing and application acceleration optimized for NUMA environments, bypassing the QPI bridge.

This card is also available as a cost optimized variant for 10GE and 40GE.

Network I/F

  • Physical I/F: QSFP28 x 2
  • Media rate:IEEE802.3 10/25/40/100GE
  • Number of ports:
    QSFP28:100Gx2, 25Gx2, 50Gx2
    QSFP+ :40Gx2, 10Gx8


Supported media

  • QSFP28:
    – 100GBASE-SR4 /100GBASE-LR4 / 100GBASE-PSM4 / 100GBASE-CWDM4 / 100GBASE-CLR4 / 100GBASE-CR4 / 100GBASE-ER4 x 2
    – 25GBASE-SR / 25GBASE-LR / 25GBASE-CR x 2
    (Coming soon:
    50GBASE-SR2 / 50GBASE-LR2 / 50GBASE-CR2 x 2)
  • QSFP+:
    – 40GBASE-SR4 / 40GBASE-LR4 / 40GBASE-PSM4 / 40GBASE-IR4 / 40GBASE-CWDM4 / 40GBASE-ER4 / 40GBASE-ZR4 / 40GBASE-CR4 x 2
    – 10GBASE-iSR x 8


External bus

  • PCIe Gen3 x16 - x1 or x2


Onboard memory

  • 16GB(64bit DDR4)



  • Capture rate: Line rate (burst and continuous)



  • Adapter to host memory:3.2ns or less
  • Host memory to adapter (Tx port):3.2ns or less



  • Resolution:3.2ns
  • Accuracy:20ns or less


Time synchronization

  • PPS synchronization(SMA connector)
  • PTP client synchronization(RJ45)
  • PPS synchronization by coaxial cable connection (SMA connector) between multiple adapters


FPGA firmware

  • Fail-safe dual boot image
  • On-site upgrade with API utility tools


Hardware specification

  • Dimention:111x254mm(Full Height, 3/4 Length)
  • Weight:320g
  • Working environment
  • :0-55℃
  • :20-80%
  • Environmental requirements:RoHS、CE


Hardware monitor function

  • On-board temperature sensor
  • On-board multicolor status LED
  • Port link status LED
    (Information can be acquired by API)



  • Common API for all Fiberblaze adapters
  • WinPCAP, LibPCAP compatible
  • C compatible API(DLL/Shared library)
  • Windows、Linux、FreeBSD driver included
  • Multi DMA access via packet ring buffer (PRB)
  • Up to 64 channels of host buffer (ring buffer)
  • Up to 255 channels of traffic redirection function
  • Error handler function
  • No additional SW library



  • Up to 64 DMA channels
  • Load distribution is realized by assigning packets from each channel to multiple host processors (CPUs)
  • Copy the received same stream to multiple DMA channels
  • N, 2, 3, 5, N tuple hash and filter rules can be applied within the adapter without using host resources



  • Media rate: 10 M, 100 M, 1 G, 10 G, 25 G, 40 G, 100 Gbps (depending on the model)
  • Supported media modules: SFP, SFP +, QSFP +, CFP 4, QSFP 28 (depending on model)
  • Supports acquisition of stream via SPAN port and L1 TAP
  • Ethernet media auto-negotiation function
  • Supports connection by span / mirror port and inline TAP



  • Capable of line rate capture with or without hardware filter
  • Supports PCIe Gen 3, Gen 2, Gen 1 as external bus



Comprehensive hardware filter function that can be defined / integrated in real time (various functions such as range filter, pattern filter, match filter, True or False are also provided)

  • Link layer
  • ARP, Tunnels(L2TP), MAC, VLAN incl. VLAN in VLAN, MPLS, etc.
  • Internet layer
  • IPv4, IPv6, ICMP, RIP, OSPF, ECN, etc.
  • Transport layer
  • UDP, TCP, SCTP, etc.
  • Application layer
  • FTP, HTTP, LDAP, POP, RTP, SIP, SMTP, Telnet, GTPv 1 + v 2, RNSAP,
    RN via SIGTRAN, GTP-U payload header, etc.
  • Error packet



Comprehensive packet slicing function to save memory and storage capacity

  • Fixed length
  • Dynamic slice with specific header and user defined offset



Give the following packet header on the adapter

  • PCAP header
  • Extended header various



It is possible to parse and normalize all common protocols including GTP Layer 2-5. With each field, the dynamic offset function allows the host application to directly access the relevant fields without having to process the protocol stack. Reduce the use of host resources and speed up applications.



Delete duplicate packets on the adapter. Reduce unnecessary processing on the host, enabling faster applications.



Fragmented IP packet reconfigured on adapter. Reduced consumption consumption of host CPU.



RFC 2819 Statistics function compliant with RMON 1 subset, each statistical information provided at 1 second intervals

  • Network counter:
  • Number of octets, number of CRC array errors, number of under size packets, number of oversized packets, number of Java packets, others
  • Provide separate counter for each interface
  • Acquired via API



  • Temperature (current, minimum, maximum)
  • Optical module output
  • Port link state
  • Acquired via API



10GE Capture Cards: Silicom PB_fbC2CGg3hl Datasheet